Computation Emerges from Adaptive Synchronization of Networking Neurons
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{"title"=>"Computation emerges from adaptive synchronization of networking neurons", "type"=>"journal", "authors"=>[{"first_name"=>"Massimiliano", "last_name"=>"Zanin", "scopus_author_id"=>"23991967500"}, {"first_name"=>"Francisco", "last_name"=>"Del Pozo", "scopus_author_id"=>"55663615800"}, {"first_name"=>"Stefano", "last_name"=>"Boccaletti", "scopus_author_id"=>"7006291912"}], "year"=>2011, "source"=>"PLoS ONE", "identifiers"=>{"pui"=>"362874190", "scopus"=>"2-s2.0-80455145110", "isbn"=>"10.1371/journal.pone.0026467", "pmid"=>"22073167", "sgr"=>"80455145110", "issn"=>"19326203", "doi"=>"10.1371/journal.pone.0026467"}, "id"=>"7a77c0ac-8b7c-39fa-b51f-01caeaa862f7", "abstract"=>"The activity of networking neurons is largely characterized by the alternation of synchronous and asynchronous spiking sequences. One of the most relevant challenges that scientists are facing today is, then, relating that evidence with the fundamental mechanisms through which the brain computes and processes information, as well as with the arousal (or progress) of a number of neurological illnesses. In other words, the problem is how to associate an organized dynamics of interacting neural assemblies to a computational task. Here we show that computation can be seen as a feature emerging from the collective dynamics of an ensemble of networking neurons, which interact by means of adaptive dynamical connections. Namely, by associating logical states to synchronous neuron's dynamics, we show how the usual Boolean logics can be fully recovered, and a universal Turing machine can be constructed. Furthermore, we show that, besides the static binary gates, a wider class of logical operations can be efficiently constructed as the fundamental computational elements interact within an adaptive network, each operation being represented by a specific motif. Our approach qualitatively differs from the past attempts to encode information and compute with complex systems, where computation was instead the consequence of the application of control loops enforcing a desired state into the specific system's dynamics. Being the result of an emergent process, the computation mechanism here described is not limited to a binary Boolean logic, but it can involve a much larger number of states. As such, our results can enlighten new concepts for the understanding of the real computing processes taking place in the brain.", "link"=>"http://www.mendeley.com/research/computation-emerges-adaptive-synchronization-networking-neurons", "reader_count"=>32, "reader_count_by_academic_status"=>{"Unspecified"=>1, "Researcher"=>9, "Student > Ph. D. Student"=>8, "Student > Master"=>2, "Other"=>1, "Student > Bachelor"=>3, "Lecturer"=>3, "Lecturer > Senior Lecturer"=>1, "Professor"=>4}, "reader_count_by_user_role"=>{"Unspecified"=>1, "Researcher"=>9, "Student > Ph. D. Student"=>8, "Student > Master"=>2, "Other"=>1, "Student > Bachelor"=>3, "Lecturer"=>3, "Lecturer > Senior Lecturer"=>1, "Professor"=>4}, "reader_count_by_subject_area"=>{"Engineering"=>2, "Unspecified"=>2, "Medicine and Dentistry"=>2, "Agricultural and Biological Sciences"=>4, "Neuroscience"=>2, "Philosophy"=>1, "Physics and Astronomy"=>8, "Psychology"=>5, "Social Sciences"=>1, "Computer Science"=>5}, "reader_count_by_subdiscipline"=>{"Engineering"=>{"Engineering"=>2}, "Medicine and Dentistry"=>{"Medicine and Dentistry"=>2}, "Neuroscience"=>{"Neuroscience"=>2}, "Social Sciences"=>{"Social Sciences"=>1}, "Physics and Astronomy"=>{"Physics and Astronomy"=>8}, "Psychology"=>{"Psychology"=>5}, "Agricultural and Biological Sciences"=>{"Agricultural and Biological Sciences"=>4}, "Computer Science"=>{"Computer Science"=>5}, "Unspecified"=>{"Unspecified"=>2}, "Philosophy"=>{"Philosophy"=>1}}, "reader_count_by_country"=>{"Turkey"=>1, "United States"=>2, "Japan"=>1, "Luxembourg"=>1, "China"=>1, "Finland"=>1, "Brazil"=>2, "United Kingdom"=>1, "Spain"=>1}, "group_count"=>1}

Scopus | Further Information

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Figshare

  • {"files"=>["https://ndownloader.figshare.com/files/715512"], "description"=>"<p>A) The NOT gate is constructed by feeding a reference signal <i>R</i> into port <i>A</i>, and the signal to be processed into port <i>B</i> of the computational unit of <a href=\"http://www.plosone.org/article/info:doi/10.1371/journal.pone.0026467#pone-0026467-g001\" target=\"_blank\">Figure 1</a>. B) Following the adaptive dynamics (see the text for further details), the output of the neuron results in the logical opposite of the input. C) (Color online) Temporal snapshots of all signals involved in the computation: the spikes' patterns corresponding to the reference <i>R</i>, the internal dynamics <i>ID</i> induced by the common noise, and the input and output signals. Following the definition used for the association of the Boolean states (see text), the red (blue) color indicates a 0 (1) bit. The black color is, instead used for coloring the transient intervals of the output signal before its convergence to the logical response.</p>", "links"=>[], "tags"=>["unary"], "article_id"=>385877, "categories"=>["Physics", "Biophysics", "Information And Computing Sciences", "Physiology", "Biological Sciences", "Neuroscience"], "users"=>["Massimiliano Zanin", "Francisco Del Pozo", "Stefano Boccaletti"], "doi"=>"https://dx.doi.org/10.1371/journal.pone.0026467.g002", "stats"=>{"downloads"=>1, "page_views"=>6, "likes"=>0}, "figshare_url"=>"https://figshare.com/articles/_The_unary_NOT_gate_/385877", "title"=>"The unary NOT gate.", "pos_in_sequence"=>0, "defined_type"=>1, "published_date"=>"2013-02-20 11:56:56"}
  • {"files"=>["https://ndownloader.figshare.com/files/715411"], "description"=>"<p>A) Schematic representation of the basic computation unit. A neuron, subject to a common Gaussian noise, receives two control signals from ports <i>A</i> and <i>B</i>. B) Output signal of the neuron as a function of (the synchronization error between the signals entering ports <i>A</i> and <i>B</i>). If is of the order of 0 (), the neuron's output sequence of spikes follows the internal dynamics <i>ID</i> (the spike sequence of the signal entering from port <i>A</i>).</p>", "links"=>[], "tags"=>["computation"], "article_id"=>385771, "categories"=>["Physics", "Biophysics", "Information And Computing Sciences", "Physiology", "Biological Sciences", "Neuroscience"], "users"=>["Massimiliano Zanin", "Francisco Del Pozo", "Stefano Boccaletti"], "doi"=>"https://dx.doi.org/10.1371/journal.pone.0026467.g001", "stats"=>{"downloads"=>0, "page_views"=>3, "likes"=>0}, "figshare_url"=>"https://figshare.com/articles/_Basic_computation_unit_/385771", "title"=>"Basic computation unit.", "pos_in_sequence"=>0, "defined_type"=>1, "published_date"=>"2013-02-20 11:56:23"}
  • {"files"=>["https://ndownloader.figshare.com/files/715870"], "description"=>"<p>A) Network motif corresponding to a Set Reset Flip Flop. Same stipulations as for <a href=\"http://www.plosone.org/article/info:doi/10.1371/journal.pone.0026467#pone-0026467-g003\" target=\"_blank\">Figure 3a</a>. B) Temporal evolution of for the two inputs and two outputs of the Flip Flop motif. C) Network motif corresponding to a differentiator gate, whose output is zero all the time, except (and during a limited amount of time) when the input changes from zero to one. D) Temporal evolution of for the input and the output resulting from the differentiation.</p>", "links"=>[], "tags"=>["physiology", "Computational biology", "biophysics", "neuroscience", "computer science", "physics"], "article_id"=>386226, "categories"=>["Physics", "Biophysics", "Information And Computing Sciences", "Physiology", "Biological Sciences", "Neuroscience"], "users"=>["Massimiliano Zanin", "Francisco Del Pozo", "Stefano Boccaletti"], "doi"=>"https://dx.doi.org/10.1371/journal.pone.0026467.g005", "stats"=>{"downloads"=>0, "page_views"=>3, "likes"=>0}, "figshare_url"=>"https://figshare.com/articles/_Dynamical_logical_gates_/386226", "title"=>"Dynamical logical gates.", "pos_in_sequence"=>0, "defined_type"=>1, "published_date"=>"2013-02-20 11:58:47"}
  • {"files"=>["https://ndownloader.figshare.com/files/715748"], "description"=>"<p>A) Network motif corresponding to a full Boolean adder. Same stipulations as for <a href=\"http://www.plosone.org/article/info:doi/10.1371/journal.pone.0026467#pone-0026467-g003\" target=\"_blank\">Figure 3a</a>. B) Temporal evolution of for the three inputs (, and ) and two outputs ( and ) of the adder. The synchronization level is calculated with respect to the reference signal for the three inputs, and with respect to for the outputs.</p>", "links"=>[], "tags"=>["boolean"], "article_id"=>386114, "categories"=>["Physics", "Biophysics", "Information And Computing Sciences", "Physiology", "Biological Sciences", "Neuroscience"], "users"=>["Massimiliano Zanin", "Francisco Del Pozo", "Stefano Boccaletti"], "doi"=>"https://dx.doi.org/10.1371/journal.pone.0026467.g004", "stats"=>{"downloads"=>0, "page_views"=>1, "likes"=>0}, "figshare_url"=>"https://figshare.com/articles/_Full_boolean_adder_/386114", "title"=>"Full boolean adder.", "pos_in_sequence"=>0, "defined_type"=>1, "published_date"=>"2013-02-20 11:58:13"}
  • {"files"=>["https://ndownloader.figshare.com/files/715643"], "description"=>"<p>A) Circuit configurations corresponding to the Boolean gates NAND, XOR, and a reference translator (<i>R change</i>). Dashed (solid) lines indicate the signal entering port <i>A</i> (<i>B</i>). In all cases, the numbers indicate the weights of the signals to be summed. B) Table representing the two inputs, the signals present at position * of A), and the output signals. Notice that the output of the XOR operation is expressed in terms of , and that the reference translator converts it back to a <i>R</i> referenced signal. C) Temporal evolution of (the synchronization level with the reference signal <i>R</i>, see Eq. 5) for the two inputs, and for the output of each gate.</p>", "links"=>[], "tags"=>["binary"], "article_id"=>386007, "categories"=>["Physics", "Biophysics", "Information And Computing Sciences", "Physiology", "Biological Sciences", "Neuroscience"], "users"=>["Massimiliano Zanin", "Francisco Del Pozo", "Stefano Boccaletti"], "doi"=>"https://dx.doi.org/10.1371/journal.pone.0026467.g003", "stats"=>{"downloads"=>0, "page_views"=>1, "likes"=>0}, "figshare_url"=>"https://figshare.com/articles/_Other_binary_logical_gates_/386007", "title"=>"Other binary logical gates.", "pos_in_sequence"=>0, "defined_type"=>1, "published_date"=>"2013-02-20 11:57:40"}

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Relative Metric

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